TR EN

DIGITAL ELECTRONIC CIRCUITS COURSE IDENTIFICATION AND APPLICATION INFORMATION

Code Name of the Course Unit Semester In-Class Hours (T+P) Credit ECTS Credit
EEM419 DIGITAL ELECTRONIC CIRCUITS 7 3 3 6

WEEKLY COURSE CONTENTS AND STUDY MATERIALS FOR PRELIMINARY & FURTHER STUDY
Week Preparatory Topics(Subjects) Method
1 - Basic waveshape and digital electronics fundamentals -
2 - Metal-Oxide Semiconductor (MOS) Transistor Fundamentals -
3 - Structure and Operation of the MOS Transistor -
4 - Threshold Voltage of the MOS Transistor, First-Order Current-Voltage Characteristics -
5 - Velocity-Saturated Current Equations ,Subthreshold Conduction -
6 - Capacitances of the MOS Transistor (thin-oxide capacitance, pn junction capacitance, overlap capacitance) , Operation of MOS Inverters -
7 - Static NMOS Inverter Analysis Transistors as Load Devices: Saturated Enhancement Load; Linear Enhancement Load CMOS Inverter Analyis -
8 - MID-TERM EXAM -
9 - Pseudo-NMOS Inverters, Sizing Inverters, Tristate Inverters -
10 - Static MOS Gate Circuits, CMOS Gate Circuits (gate sizing, fanin/fanout, VTC) -
11 - Complex CMOS Gates, XOR and XNOR Gates, Multiplexer Circuits -
12 - Flip-Flops and Latches (SR latch, JK fip-flop, JK master-slave flip-flop, JK edge-triggered flip-flop, D flip-flop and latches) -
13 - Power Dissipation in CMOS (dynamic and static), High-Speed CMOS Logic Design -
14 - Switching Time Analysis (gate sizing), Load Capacitance (fanout gate capacitance, self-capacitance, wire capacitance), Gate Sizing for Optimal Path Delay -
15 - Optimizing Paths with Logical Effort (logical effort, branching effort, sideloads), Bipolar Digital Gate Circuits , TTL: Standard, Schottky-Clamped, ECL: 10K Series -
16 - FINAL EXAM -
17 - FINAL EXAM -